[4.0,18/72] MIPS: kernel: entry.S: Set correct ISA level for mips_ihb. Linux kernel source tree. Contribute to torvalds/linux development by creating an account on GitHub. U-Boot, Linux, Elixir. 2020 internships. U-Boot, Linux, Elixir. Elixir Cross Referencer. Home; Engineering; Training; Docs; Community; Company; twitter; mastodon. On Fri, 18 Aug 2017, Maciej W. Rozycki wrote: > > When building a kernel for the microMIPS ISA, ensure that the ISA bit > > ie. bit 0 in the entry address is set.

Commit 6ebb496ffc7e"MIPS: kernel: entry.S: Add MIPS R6 related definitions" added the MIPSR6 definition but it did not update the ISA level of the actual assembly code so a pre-MIPSR6 jr.hb instruction was generated instead. Fix this by using the MISP_ISA_LEVEL_RAW macro. Indeed: > >$ mips-linux-gnu-nm vmlinux grep kernel_entry >80100000 T __kernel_entry >804fca20 T kernel_entry >$ mips-mti-linux-gnu-nm vmlinux grep kernel_entry >ffffffff80100000 T __kernel_entry >ffffffff804fca20 T kernel_entry >$ > >which means you can't rely on `nm' sign-extending addresses to 64 bits >with 32-bit binaries.

[3.19.y-ckt,036/102] MIPS: Flush RPS on kernel entry with EVA. Hi Paul, > I originally did this [1], and wrote about it in the post-three-dashes notes > for this patch. To quote myself: > > > I originally tried using "objdump -f" to obtain the entry address, which > > works for microMIPS but it always outputs a 32 bit address for a 32 bit > > ELF whilst nm will sign extend to 64 bit. @@ -107,11 117,6 @@ FEXPORTrestore_allrestore full frame. xor t0, t0, t3. mtc0 t0, CP0_TCCONTEXT. 系统加电启动后,mips处理器默认的程序入口是0xbfc00000虚拟地址,此地址在kseg1(无缓存)区域内,对应的物理地址是0x1fc00000(高3位清零),所以cpu从物理地址0x1fc00000开始取第一条指令,这个地址在硬件上已经确定为flash(bios)的位置,bios将linux内核镜像文件.

3.18-stable review patch. If anyone has any objections, please let me know. ----- From: Paul Burton .

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